In existent semiconductor photodiode devices, there has been a technique for overcoming a trade-off relation of the thickness and the inter-p/n electrode distance required for the photoreceiving portion thereby attaining both high speed performance and high efficiency performance (for example, refer to JP-T-2007-527626).
Further, in existent bipolar phototransistors having a photoreceiving portion and an amplification portion together, a bipolar transistor in which the width of the depletion layer in collector/base is made different between the photoreceiving portion and the amplification portion has been known for compatibilizing the high speed performance and the photoreceiving efficiency of the transistor (for example, refer to JP-A-Sho57(1982)-207383).